• System on Chip - Design Flow

      Title: System on Chip - Design Flow

      Topic: Computer system design

      Category Level: Problem solving

      Degree weight: 4

      Materials: RS232, VHDL, Xilinx ISE, Xilinx Isim

      Augmented Reality Interface: Y

      Remote Lab: Y

      Short description: This exercise will familiarize the students even more with challenges involved in SoC design. Modern embedded systems more and more often consist of more than one processing elements with different properties providing performance improvement with significantly less cost and improved energy efficiency. These systems usually contain a more complex interconnect structure because different modes of data transmission are required (burst, stream...). The task which the students will have to accomplish will be to design and implement a SoC with two processing elements, one of which will be the MicroBlaze processor and the other one a dedicated hardware accelerator for matrix multiplication. AXI bus architecture represents an excellent solution for this type of problem due to variety of interface types which will be explored and used in this exercise.

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